This invention relates to switching-type power converters and in particularly to forward and flyback-type DC/DC converters that use MOSFET devices used as synchronous output rectifiers with gates that are driven by the secondary voltage signal of the power transformer.
The inefficiency of MOSFET devices as self-driven synchronous rectifiers in prior art buck-driven converters has limited their use. Also, the reset voltage for the transformer core in forward converters designed without an active clamp limits the conduction time of one of the MOSFET devices in the synchronous rectifiers, thereby decreasing the efficiency of the converter.
In the prior art forward converter shown in FIG. 1A, an isolating power transformer is combined with a self-synchronized synchronous rectifier. In such a rectifier the gates of the MOSFET rectifiers Q2 and Q3 are driven by the secondary winding 108 of the power transformer.
A DC input voltage 100, Vin, is connected to the primary winding 106 of the power transformer by a MOSFET power switch Q1104. The secondary winding 108 is connected to an output lead 118 through an output filter inductor 114 and the synchronous rectifier MOSFET devices Q2110 and Q3112. Each rectifying MOSFET device includes an inherent body diode 120 and 122, respectively.
When Q1104 is conducting, the input voltage Vin 100 is applied directly across the primary winding 106. The secondary winding 108 provides a current flow through the inductor 114, a load connected to the output lead 118, and back through the MOSFET rectifier Q2110 to the secondary winding 108. Continuity of the current flow in the inductor 114 is maintained via the MOSFET rectifier Q3112. An output filter capacitor 116 shunts the output of the converter and the load (not shown).
FIG. 1B shows the voltage and current waveforms of the converter of FIG. 1A. When the pulse width modulator (PWM) 102 turns off MOSFET Q1104, disconnecting the primary winding 106 of the power transformer, the drain voltage of Q1140 rises and, due to parasitic capacitances, assumes a sinusoidal wave-form from t0 to t1. During this time t0-t1, the power transformer core resets itself (reset period). The sinusoidal portion of 140 appears at the drain of Q2 and the gate of Q3 as shown in the trace 142. During this reset period the current through Q2 IQ2 drops to zero and all the current through the inductor 114 is supplied by Q3 shown in trace 148. Specifically the current through Q3 IQ3148 assumes its maximum at t0 and then linearly decreases from t0 to t1.
Still referring to FIG. 1B, from t1 to t2, both MOSFET rectifiers Q2 and Q3 are off because the gate driving signals of both Q2144 and Q3142 are zero. The period from t1 to t2 is referred to as the xe2x80x9cdead timexe2x80x9d period in which no power transfer or transformer core resetting takes place. During this dead time, the inductor 114 current, IL, in trace 150 continues to flow through the body diodes of Q3122 and Q2120. Most of the inductor current flows through 122 since the secondary winding 108 is in series with diode 120.
There is a loss of efficiency during this dead time since the forward voltage drop of the MOSFET body diodes is about 1 volt as compared to 0.1 volts when the MOSFET is on. Moreover, as the input voltage, Vin, increases the dead time period increases and the efficiency of the converter decreases. At maximum input voltage, the inefficiency of the prior art DC converter is greatest.
At the end of the dead time, t2, the gate voltage of Q2110 is zero, the secondary momentarily forward biases the body diode 120 of Q2110 allowing the secondary current to flow. As soon as the dotted end of secondary 108 exceeds the gate threshold voltage of Q2110, Q2 turns on supplying all the secondary current.
From t2 to t3, Q1104 turns on again (the power transfer period of the conversion cycle) and Q2110 turns on connecting the secondary 108 of T1 through inductor 114 to the output terminal 118 and any load across Vo.
During t2-t3, load current is carried through the secondary 108 and Q2110. During this time energy is stored in the output inductor 114 and on the output capacitor 116. The gate driving signal for Q2110 is shown in trace 144, which is the inverted lower part of the drain waveform of Q1140.
Driving the MOSFET synchronous rectifiers directly from the transformer secondary reduces the efficiency of the converter. Even though the self-driven synchronous rectifiers in the forward converter are simple and low-cost, the inherent low efficiency reduces the maximum possible power density of the converter, raises the converter""s temperature, thereby lowering its reliability and making the converter unsuitable for high-power density applications.
Therefore there is a need for an efficiency improved version of a forward unclamped converter with synchronous rectifiers.
Forward converter designs using an xe2x80x9cactive clampxe2x80x9d to clamp the primary voltage generated during the dead time period also suffer from inefficiencies, especially when the input voltage is at its maximum. Typically, DC converters must operate over a 2:1 input voltage range. Forward converters with an active clamp require more complex timing circuitry and additional power MOSFETs. A prior art active clamp circuit is described U.S. Pat. No. 4,441,146 assigned to Vicor Corporation..
In view of the foregoing background discussion, the present invention provides the combining of primary and secondary signals in an unclamped forward converter to generate the gate drive signals for MOSFET synchronous rectifiers. During the power transfer period, a first MOSFET, which connects the secondary of the transformer to load return (usually ground), is directly driven from the secondary. However, a second MOSFET synchronous rectifier is driven from a combination of the transformer secondary and a second pulse transformer. The second MOSFET rectifier is turned on and remains on during the reset and dead time period of the conversion, its gate drive signal starts at the beginning of the reset period and terminates prior to the start of the power transfer period.
The advantage is having the second MOSFET is on and supplying current rather than having the current travel through its intrinsic diode. Therefore there is better conversion efficiency due to the lower voltage drop across the on MOSFET as compared to its intrinsic diode.